MIPI Alliance’s family of specialized, point-to-point, physical layer (PHY) serial interfaces support a variety of chip-to-chip, chip-to-camera and chip-to-display applications that require high bandwidth, low power and low electromagnetic interference (EMI) performance. Each of the PHYs offers unique advantages and features that collectively address the most essential interface requirements for mobile and mobile-influenced designs for use cases such as smartphones, the Internet of Things (IoT) and automotive.
The latest trend for semiconductor device manufacturers is to add several high-speed MIPI® specification-based ports to a single device. This enables feature-rich implementations of imaging- and display-intensive applications, although it also poses significant challenges for production test engineers who are tasked with creating high-fault coverage testing solutions on automated test equipment (ATE). Such fault coverage often entails creating a parallel, at-speed, system-oriented functional test while simultaneously grappling with the limitations of legacy ATE and the complexity of the MIPI protocols being tested. This post describes production testing methodologies of MIPI-based devices on any ATE platform, whether it is at the wafer test stage or the final test stage.
MIPI Alliance periodically receives questions about how its legal policies apply in different circumstances. This post addresses questions we’ve received about the requirement that MIPI protocols be used only with MIPI PHYs. The post explains existing policy. It does not change any current MIPI Alliance legal terms.
MIPI Alliance has recently released new versions of its two physical layer specifications designed for high-performance, cost-optimized cameras and displays. MIPI C-PHYSM v2.0, released in September 2019, and MIPI D-PHYSM v2.5, released in October, introduce key new features that make the specifications applicable for expanded Internet of Things (IoT) use cases along with many mobile use cases.